? semiconductor components industries, llc, 2006 october, 2006 ? rev. 7 1 publication order number: mc14584b/d mc14584b hex schmitt trigger the mc14584b hex schmitt trigger is constructed with mos p ? channel and n ? channel enhancement mode devices in a single monolithic structure. these devices find primary use where low power dissipation and/or high noise immunity is desired. the mc14584b may be used in place of the mc14069ub hex inverter for enhanced noise immunity to ?square up? slowly changing waveforms. features ? supply voltage range = 3.0 vdc to 18 vdc ? capable of driving two low ? power ttl loads or one low ? power schottky ttl load over the rated temperature range ? double diode protection on all inputs ? can be used to replace mc14069ub ? for greater hysteresis, use mc14106b which is pin ? for ? pin replacement for cd40106b and mm74cl4 ? pb ? free packages are available maximum ratings (voltages referenced to v ss ) symbol parameter value unit v dd dc supply voltage range ? 0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) ? 0.5 to v dd + 0.5 v i in , i out input or output current (dc or transient) per pin 10 ma p d power dissipation, per package (note 1) 500 mw t a ambient temperature range ? 55 to +125 c t stg storage temperature range ? 65 to +150 c t l lead temperature (8 ? second soldering) 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. temperature derating: plastic ?p and d/dw? packages: ? 7.0 mw/ c from 65 c to 125 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high ? impedance circuit. for proper operation, v in and v out should be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. http://onsemi.com marking diagrams 1 14 pdip ? 14 p suffix case 646 mc14584bcp awlyywwg soic ? 14 d suffix case 751a tssop ? 14 dt suffix case 948g 1 14 14584bg awlyww 14 584b alyw 1 14 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free package soeiaj ? 14 f suffix case 965 1 14 mc14584b alywg see detailed ordering and shipping information in the package dimensions sec tion on page 2 of this data sheet. ordering information (note: microdot may be in either location)
mc14584b http://onsemi.com 2 pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 out 5 in 5 out 6 in 6 v dd out 4 in 4 out 2 in 2 out 1 in 1 v ss out 3 in 3 logic diagram 13 11 9 5 3 1 12 10 8 6 4 2 v dd = pin 14 v ss = pin 7 eqivalent circuit schematic (1/6 of circuit shown) ordering information device package shipping ? mc14584bcp pdip ? 14 25 units / rail mc14584bcpg pdip ? 14 (pb ? free) mc14584bd soic ? 14 55 units / rail MC14584BDG soic ? 14 (pb ? free) mc14584bdr2 soic ? 14 2500 / tape & reel mc14584bdr2g soic ? 14 (pb ? free) mc14584bdtr2 tssop ? 14* mc14584bdtr2g tssop ? 14* mc14584bf soeiaj ? 14 50 units / rail mc14584bfg soeiaj ? 14 (pb ? free) mc14584bfel soeiaj ? 14 2000 / tape & reel mc14584bfelg soeiaj ? 14 (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free.
mc14584b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? (voltages referenced to v ss ) characteristic symbol v dd vdc ? 55 c 25 c 125 c unit min max min typ (2) max min max output voltage ?0? level v in = v dd v ol 5.0 10 15 ? ? ? 0.05 0.05 0.05 ? ? ? 0 0 0 0.05 0.05 0.05 ? ? ? 0.05 0.05 0.05 vdc v in = 0 ?1? level v oh 5.0 10 15 4.95 9.95 14.95 ? ? ? 4.95 9.95 14.95 5.0 10 15 ? ? ? 4.95 9.95 14.95 ? ? ? vdc output drive current (v oh = 2.5 vdc) source (v oh = 4.6 vdc) (v oh = 9.5 vdc) (v oh = 13.5 vdc) i oh 5.0 5.0 10 15 ? 3.0 ? 0.64 ? 1.6 ? 4.2 ? ? ? ? ? 2.4 ? 0.51 ? 1.3 ? 3.4 ? 4.2 ? 0.88 ? 2.25 ? 8.8 ? ? ? ? ? 1.7 ? 0.36 ? 0.9 ? 2.4 ? ? ? ? madc (v ol = 0.4 vdc) sink (v ol = 0.5 vdc) (v ol = 1.5 vdc) i ol 5.0 10 15 0.64 1.6 4.2 ? ? ? 0.51 1.3 3.4 0.88 2.25 8.8 ? ? ? 0.36 0.9 2.4 ? ? ? madc input current i in 15 ? 0.1 ? 0.00001 0.1 ? 1.0 adc input capacitance (v in = 0) c in ? ? ? ? 5.0 7.5 ? ? pf quiescent current (per package) i dd 5.0 10 15 ? ? ? 0.25 0.5 1.0 ? ? ? 0.0005 0.0010 0.0015 0.25 0.5 1.0 ? ? ? 7.5 15 30 adc total supply current (3) (4) (dynamic plus quiescent, per package) (c l = 50 pf on all outputs, all buffers switching) i t 5.0 10 15 i t = (1.8 a/khz) f + i dd i t = (3.6 a/khz) f + i dd i t = (5.4 a/khz) f + i dd adc hysteresis voltage v h (5) 5.0 10 15 0.27 0.36 0.77 1.0 1.3 1.7 0.25 0.3 0.6 0.6 0.7 1.1 1.0 1.2 1.5 0.21 0.25 0.50 1.0 1.2 1.4 vdc threshold voltage positive ? going v t+ 5.0 10 15 1.9 3.4 5.2 3.5 7.0 10.6 1.8 3.3 5.2 2.7 5.3 8.0 3.4 6.9 10.5 1.7 3.2 5.2 3.4 6.9 10.5 vdc negative ? going v t? 5.0 10 15 1.6 3.0 4.5 3.3 6.7 9.7 1.6 3.0 4.6 2.1 4.6 6.9 3.2 6.7 9.8 1.5 3.0 4.7 3.2 6.7 9.9 vdc 2. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. 3. the formulas given are for the typical characteristics only at 25 c. 4. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l ? 50) vfk where: i t is in a (per package), c l in pf, v = (v dd ? v ss ) in volts, f in khz is input frequency, and k = 0.001. 5. v h = v t+ ? v t? (but maximum variation of v h is specified as less than v t + max ? v t ? min ). ????????????????????????????????? ????????????????????????????????? switching characteristics (c l = 50 pf, t a = 25 c) characteristic symbol v dd vdc min typ (6) max unit output rise time t tlh 5.0 10 15 ? ? ? 100 50 40 200 100 80 ns output fall time t thl 5.0 10 15 ? ? ? 100 50 40 200 100 80 ns propagation delay time t plh , t phl 5.0 10 15 ? ? ? 125 50 40 250 100 80 ns 6. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance.
mc14584b http://onsemi.com 4 figure 1. switching time test circuit and waveforms pulse generator v dd input c l v ss 7 output 20 ns 20 ns v dd v ss v oh v ol 90% 50% 10% 90% 50% 10% t plh t phl output input t f t r v dd v t+ v t? v ss v dd v ss v out v in v h v h v dd v t+ v t? v ss v dd v ss v out v in v dd 0 v dd v t+ v t? 0 v h v in , input voltage (vdc) v out , output voltage (vdc) figure 2. typical schmitt trigger applications (b) a schmitt trigger offers maximum noise immunity in gate applications. (a) schmitt triggers will square up inputs with slow rise and fall times. figure 3. typical transfer characteristics v in v out 14
mc14584b http://onsemi.com 5 package dimensions pdip ? 14 case 646 ? 06 issue p 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ? t ? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc14584b http://onsemi.com 6 package dimensions soic ? 14 case 751a ? 03 issue h notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint* 7x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc14584b http://onsemi.com 7 package dimensions tssop ? 14 case 948g ? 01 issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc14584b http://onsemi.com 8 package dimensions soeiaj ? 14 case 965 ? 01 issue a h e a 1 dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.004 0.008 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 1.42 ??? 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc14584b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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